CS4354-CSZ【PDF 11/24 页】IC DAC 24BIT SRL 14SOIC

DS895F2

CS4354

shows the recommended power arrangements with VA and VL connected to clean supplies. It is strongly

recommended that a single ground plane be used with the GND pins connected to the common plane; this

is important because both pin 6 and pin 10 provide analog ground reference to the CS4354. Should it be

necessary to split the ground planes, the CS4354 should be placed entirely in the analog plane. In this con-

figuration, it is critical that the digital and analog ground planes be tied together with a low-impedance con-

nection, ideally a strip of copper on the printed circuit board, at a single point near the CS4354.

All signals, especially clocks, should be kept away from the FILT+ pin in order to avoid unwanted coupling

into the DAC.

4.10.1

Capacitor Placement

Decoupling capacitors should be placed as close to the device as possible, with the low-value ceramic

capacitor being the closest. To further minimize impedance, these capacitors should be located on the

same PCB layer as the device. See DC Electrical Characteristics for the voltage present across pin pairs.

This is useful for choosing appropriate capacitor voltage ratings and orientation if electrolytic capacitors

are used.

The CDB4354 evaluation board demonstrates the optimum layout and power supply arrangements.

发布紧急采购，3分钟左右您将得到回复。

(若只采购一条型号，填写一行即可)

*型号	*数量	厂商	批号	封装

添加更多采购